CD4013 - Dual D Type Flip-Flop IC
CD4013 - Dual D Type Flip-Flop IC
The CD4013 designed as a CMOS logic chip IC belongs to the CD4XXX IC series. The CD4013 device comprises two identical, independent data-type flip-flops. Each flip-flop comes with independent data, set, reset, and clock inputs, and Q and Q’ outputs. These devices are commonly used for shift register applications, and, by connecting Q output to the data input, for counter and toggle applications. The logic level present at the D input is transmitted to the Q output during the positive-going transition of the clock pulse. Moreover, the Setting or resetting of IC is independent of the clock and accomplished by a high level on the set or reset line, respectively. The CD4013B is manufactured in 14-pin dual-inline plastic packages (E suffix), 14-pin small-outline packages (M, MT, M96, and NSR suffixes), and 14-pin thin shrink small-outline packages (PW and PWR suffixes).
A D-type Latch/flip-flop is designed as a clocked latch that has two stable states. A D-type latch operates with a delay in input by one clock cycle. Thus, by cascading many D-type flip-flops delay circuits are often created, which are utilized in many applications like in digital television systems. A D-type flip-flop is additionally mentioned as a D flip-flop or a delay flip-flop. The D flip-flop is an edge-triggered device that transfers input files to Q on a clock rising or falling edge. Data Latches are level sensitive devices like the data latch and therefore the transparent latch.
Applications
- Power Delivery
- Grid Infrastructure
- Medical, Healthcare, and Fitness
- Body Electronics and Lighting
- Building Automation
- Telecom Infrastructure
- Test and Measurement
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Description
CD4013 - Dual D Type Flip-Flop IC
The CD4013 designed as a CMOS logic chip IC belongs to the CD4XXX IC series. The CD4013 device comprises two identical, independent data-type flip-flops. Each flip-flop comes with independent data, set, reset, and clock inputs, and Q and Q’ outputs. These devices are commonly used for shift register applications, and, by connecting Q output to the data input, for counter and toggle applications. The logic level present at the D input is transmitted to the Q output during the positive-going transition of the clock pulse. Moreover, the Setting or resetting of IC is independent of the clock and accomplished by a high level on the set or reset line, respectively. The CD4013B is manufactured in 14-pin dual-inline plastic packages (E suffix), 14-pin small-outline packages (M, MT, M96, and NSR suffixes), and 14-pin thin shrink small-outline packages (PW and PWR suffixes).
A D-type Latch/flip-flop is designed as a clocked latch that has two stable states. A D-type latch operates with a delay in input by one clock cycle. Thus, by cascading many D-type flip-flops delay circuits are often created, which are utilized in many applications like in digital television systems. A D-type flip-flop is additionally mentioned as a D flip-flop or a delay flip-flop. The D flip-flop is an edge-triggered device that transfers input files to Q on a clock rising or falling edge. Data Latches are level sensitive devices like the data latch and therefore the transparent latch.
Applications
- Power Delivery
- Grid Infrastructure
- Medical, Healthcare, and Fitness
- Body Electronics and Lighting
- Building Automation
- Telecom Infrastructure
- Test and Measurement
